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 Embedded Test LogicVision Embedded Memory Test (EMT) LogicVision EMT is designed to lower field returns by offering a true “at-speed” memory test solution. Using on-chip generated algorithmic test patterns for a wide range of embedded memories, it provides memory testing across any number of clock domains and frequencies. With its RTL level test rule checking, test planning and integration, EMT is able to shorten time-to-market by reducing design for test (DFT) turnaround time. 
LogicVision EMT with Repair Optimized for at-speed test, EMT-Repair is designed to scale with design application speeds. EMT controllers are configurable to support a variety of memory types, as well as a range of memory timing interfaces and memory port configurations. Built-in Repair Analysis (BIRA) circuitry is placed in the collar of a repairable memory and any number of repairable memories may be supported by a single EMT controller. Repair analysis is alsoavailable for memories containing redundant banks, rows or O/I columns.
LogicVision Programmable EMT Optimized for at-speed test, EMT-PG is designed to scale with design application speeds. EMT controllers are configurable to support a variety of memory types, as well as a range of memory timing interfaces and memory port configurations. With new defect types impacting field returns and product roll-outs, EMT-PG allows hard coding of any user-defined test algorithm at design time, or programming it in at run-time on the test floor. EMT-PG supports embedded DRAMs or SRAMs with 1RW logical port, SDRAM, EDO and page mode protocols for DRAMs.
LogicVision Embedded External Memory Test LogicVision provides programmable memory BIST solutions for most SRAM and DRAM memories, including those that utilize burst modes of operations such as DDR and QDR memories. External Programmable Memory BIST, with its run-time programmable algorithms, provides the flexibility for users to customize the execution of the memory test without relying on the ASIC designer to hard code all the possible combinations of algorithms into the controller. This greatly reduces the risk that functional memory tests will have to be developed as a result of discovering new defect types not screened with standard test algorithms.
LogicVision Embedded Logic Test ETLogic is an industry-proven embedded test and measurement IP and corresponding design automation software for at-speed test and diagnosis of digital logic blocks. This product’s random pattern-based approach provides the most efficient trade-off between test time and quality. The ETLogic patented Burst-Mode test-timing architecture provides a true at-speed test application, regardless of the number of clock domains or frequencies, and does not suffer the same test time and diagnostic drawbacks as competing double-capture test-timing approaches.
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Mixed Signal BIST Silicon Debug Yield Enhancement 
Cynthia_Chen@spirox.com.tw Tel. +886-3-5738099 ext. 2029 |
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